Mechanism of drain current saturation in a p–n junction field effect transisto

Abstract

The processes of drain current saturation in a p–n junction field‑effect transistor have been investigated. It is shown that, when analyzing saturation in a common‑source circuit or under self‑bias conditions, it is necessary to take into account the different voltage dependencies across the drain–gate and gate–source junctions in each case. The obtained results are of interest for the design of various circuits based on field‑effect transistors.